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RTL Engineer (VHDL Digital Logic)

selinc · Burnaby

New
Senior 105,600 - 158,400 CAD/year 🇬🇧 English
VHDL Verilog FPGA IEEE 802.3 MPLS SONET PTP IEEE 1588 IRIG-B JIRA GitHub Confluence

Job description

About the role

Schweitzer Engineering Laboratories (SEL) is hiring an RTL Engineer for its R&D Communications product group in Burnaby, BC. The engineer develops and supports products such as the SONET/VSN Multiplexer with TDM interfaces, Ethernet Circuit Emulation Gateway, satellite synchronized network clocks, Ethernet switches and other communication products. The role suits someone passionate about RTL digital logic for FPGAs who enjoys solving difficult problems.

Key responsibilities

  • Serve as technical lead on complex VHDL RTL digital logic projects
  • Create and maintain internal RTL design documentation
  • Write test plans and develop test harnesses and stimulus for RTL functional verification
  • Prepare design and system-level specifications
  • Participate in or moderate peer reviews of designs, documentation and test plans
  • Maintain project plans and labor estimates
  • Work with product managers on new product concepts and with cross-discipline teams

Required profile

  • B.S. in Electrical Engineering or a related discipline, or equivalent education and experience
  • 5+ years of combined experience in RTL digital design, FPGA firmware design, simulation, synthesis, timing analysis and functional verification
  • Knowledge of networking protocols, Ethernet (IEEE 802.3), MPLS, SONET and timing technologies such as PTP (IEEE 1588), IRIG-B and GPS
  • Team player, able to learn quickly, mentor others and write technical documentation well
  • Satisfactory background check and negative drug test

Required skills

  • RTL digital design with FPGAs using VHDL/Verilog
  • FPGA tools: Xilinx, Intel FPGA (Altera), Microchip (Microsemi/Actel), Lattice Semiconductor
  • Firmware design with FPGA SOCs/microprocessors using C/C++
  • RTL functional verification
  • Nice to have: supervisory experience, JIRA, GitHub, Confluence

What we offer

  • Pay range of $105,600 - $158,400 CAD annually, depending on experience
  • Health insurance covering medical, prescription, dental, vision, life and disability, plus extended coverage
  • Paid holidays, 15 days of vacation, 9 sick days, parental leave and family medical leave
  • Tuition assistance and engineering development programs

Questions fréquentes

Le salaire proposé pour ce poste est de 106-158k CAD par an. Le détail figure dans l'annonce.
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Source : ats:workday

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Published 1 day ago

Expires 1 month from now

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selinc

Burnaby