Technical VP - Computing Bus System Research

About the role

Huawei Canada’s Computing Data Application Acceleration Lab is seeking a Technical Vice President to lead research and development of next‑generation bus architectures and interconnection protocols for AI and general‑purpose computing. The role combines strategic planning, deep technical expertise, and cross‑disciplinary collaboration to keep Huawei at the forefront of large‑scale computing solutions.

Key responsibilities

• Analyze cutting‑edge bus technologies, create long‑term roadmaps, and drive technical decision‑making.
• Design and implement competitive bus architectures and protocols aligned with industry standards such as PCIe, CXL, and InfiniBand.
• Lead continuous evolution of bus technology to maintain a competitive edge for large‑scale computing clusters.
• Integrate bus solutions with chip architecture and software frameworks, ensuring system‑level innovation.
• Coordinate co‑innovation across chip design, hardware/software teams, and solution groups to achieve business goals.

Required profile

• Strong foundation in computer science and computer architecture.
• In‑depth knowledge of bus/network protocols (PCIe, CXL, InfiniBand) and related concepts such as congestion control, flow control, QoS, and fault tolerance.
• Experience designing high‑bandwidth, low‑latency interconnects for homogeneous or heterogeneous computing environments.
• Familiarity with AI large‑model training, big‑data workloads, distributed databases, and related application scenarios.
• Proven track record leading architecture design and implementation of chips or large‑scale computing products.

Required skills

• PCIe
• CXL
• InfiniBand
• High bandwidth interconnect design
• Low latency communication
• AI large‑model training expertise
• Big data processing
• Distributed database systems
• Large‑scale computing cluster architecture
• Hardware‑software co‑optimization
• Chip design and integration